View 74HC4060_4637093.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Rev. 03 -- 14 July 2008 Product data sheet
1. General description
The 74HC4060; 74HCT4060 are high-speed Si-gate CMOS device and is pin compatible with the HEF4060. The 74HC4060; 74HCT4060 are 14-stage ripple-carry counter/dividers and oscillators with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case keep the other oscillator pins (RTC and CTC) floating. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of other input conditions. In the HCT version, the MR input is TTL compatible, but the RS input has CMOS input switching levels and can be driven by a TTL output by using a pull-up resistor to VCC.
2. Features
I I I I All active components on chip RC or crystal oscillator configuration Complies with JEDEC standard no. 7 A ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Multiple package options I Specified from -40 C to +85 C and from -40 C to +125 C
3. Applications
I I I I Control counters Timers Frequency dividers Time-delay circuits
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
4. Ordering information
Table 1. Ordering information Package Temperature range Name 74HC4060N 74HCT4060N 74HC4060D 74HCT4060D 74HC4060DB 74HCT4060DB 74HC4060PW 74HC4060BQ 74HCT4060BQ -40 C to +125 C -40 C to +125 C TSSOP16 -40 C to +125 C SSOP16 -40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 5.3 mm SOT109-1 SOT338-1 -40 C to +125 C DIP16 Description plastic dual in-line package; 16 leads (300 mil) Version SOT38-4 Type number
plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm
DHVQFN16 plastic dual in-line compatible thermal-enhanced SOT763-1 very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm
5. Functional diagram
10 9
RTC CTC 11 12 RS MR Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q11 Q12 Q13 7 5 4 6 14 13 15 1 2 3
001aai467
Fig 1.
Logic symbol
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
2 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
CTR14 !G 9 10 11 12 CT = 0 CX RX RCX CT 9 11 13 (a) + 3 7 5 4 6 14 13 15 1 2 3 11 12
CTR14 3 7 5 4 AND + CT CT = 0 9 11 13 (b)
001aai468
6 14 13 15 1 2 3
Fig 2.
IEC logic symbol
10 RTC 11 RS
9 CTC CP MR 14-STAGE BINARY COUNTER Q4 5 4 Q5 6 Q6 Q7 14 Q8 13 Q9 15 1 Q11 Q12 Q13 2 3
001aai113
12
MR Q3 7
Fig 3. Functional diagram
CTC RTC RS FF 1 CP Q MR MR FF 4 CP Q MR FF 10 CP Q MR FF 12 CP Q MR FF 14 CP Q
MR
Q3
Q9
Q11
Q13
001aai114
Fig 4. Logic diagram
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
3 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
6. Pinning information
6.1 Pinning
74HC4060 74HCT4060
Q11 Q12 Q13 Q5 Q4 Q6 Q3 GND 1 2 3 4 5 6 7 8
001aai115
74HC4060 74HCT4060
16 VCC 15 Q9 Q12 14 Q7 13 Q8 12 MR 11 RS 10 RTC 9 CTC Q13 Q5 Q4 Q6 Q3 2 3 4 5 6 7 8 GND CTC 9 VCC
(1)
terminal 1 index area
16 VCC 15 Q9 14 Q7 13 Q8 12 MR 11 RS 10 RTC
1
Q11
001aai469
Transparent top view
(1) The die substrate is attached to this pad using conductive die attach material. It cannot be used as supply pin or input.
Fig 5.
Pin configuration DIP16, SO16 and (T)SSOP16
Fig 6.
Pin configuration DHVQFN16
6.2 Pin description
Table 2. Symbol Q11 to Q13 Q3 to Q9 GND CTC RTC RS MR VCC Pin description Pin 1, 2, 3 7, 5, 4, 6, 14, 13, 15 8 9 10 11 12 16 Description counter output counter output ground (0 V) external capacitor connection external resistor connection clock input /oscillator pin master reset input (active HIGH) supply voltage
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
4 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
7. Functional description
1 RS 2 4 8 16 32 64 128 256 512 1024 2048 4096 8192 16384
MR
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q11
Q12
Q13
001aai117
Fig 7.
Timing diagram
8. Limiting values
Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature VI < -0.5 V or VI > VCC + 0.5 V VO < -0.5 V or VO > VCC + 0.5 V -0.5 V < VO < VCC + 0.5 V
[1] [1]
Conditions
Min -0.5 -50 -65
Max +7 20 20 25 50 +150
Unit V mA mA mA mA mA C
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
5 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Table 3. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Ptot Parameter total power dissipation Conditions Tamb = -40 C to +125 C DIP16 package SO16 package (T)SSOP16 package DHVQFN16 package
[1] [2] [3] [4] [5]
[2] [3] [4] [5]
Min -
Max 750 500 500 500
Unit mW mW mW mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. Ptot derates linearly with 12 mW/K above 70 C. Ptot derates linearly with 8 mW/K above 70 C. Ptot derates linearly with 5.5 mW/K above 60 C. Ptot derates linearly with 4.5 mW/K above 60 C.
9. Recommended operating conditions
Table 4. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter VCC VI VO Tamb t/V supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Conditions Min 2.0 0 0 -40 74HC4060 Typ 5.0 1.67 Max 6.0 VCC VCC +125 625 139 83 Min 4.5 0 0 -40 74HCT4060 Typ 5.0 1.67 Max 5.5 VCC VCC +125 139 V V V C ns/V ns/V ns/V Unit
10. Static characteristics
Table 5. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 74HC4060 VIH HIGH-level input voltage MR input VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V RS input VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1.7 3.6 4.8 1.7 3.6 4.8 1.7 3.6 4.8 V V V 1.5 3.15 4.2 1.3 2.4 3.1 1.5 3.15 4.2 1.5 3.15 4.2 V V V Conditions Min 25 C Typ Max -40 C to +85 C -40 C to +125 C Unit Min Max Min Max
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
6 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Table 5. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIL LOW-level input voltage Conditions Min MR input VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V RS input VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage RTC output; RS = MR = GND IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -2.6 mA; VCC = 4.5 V IO = -3.3 mA; VCC = 6.0 V RTC output; RS = MR = VCC IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V IO = -0.65 mA; VCC = 4.5 V IO = -0.85 mA; VCC = 6.0 V CTC output; RS = VIH; MR = VIL IO = -3.2 mA; VCC = 4.5 V IO = -4.2 mA; VCC = 6.0 V VI = VIH or VIL; except RTC output IO = -20 A; VCC = 2.0 V IO = -20 A; VCC = 4.5 V IO = -20 A; VCC = 6.0 V VI = VIH or VIL; except RTC and CTC outputs IO = -4.0 mA; VCC = 4.5 V IO = -5.2 mA; VCC = 6.0 V 3.98 5.48 3.84 5.34 3.7 5.2 V V 1.9 4.4 5.9 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 V V V 3.98 5.48 3.84 5.34 3.7 5.2 V V 1.9 4.4 5.9 3.98 5.48 2.0 4.5 6.0 1.9 4.4 5.9 3.84 5.34 1.9 4.4 5.9 3.7 5.2 V V V V V 1.9 4.4 5.9 3.98 5.48 2.0 4.5 6.0 1.9 4.4 5.9 3.84 5.34 1.9 4.4 5.9 3.7 5.2 V V V V V 0.3 0.9 1.2 0.3 0.9 1.2 0.3 0.9 1.2 V V V 0.8 2.1 2.8 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 V V V 25 C Typ Max -40 C to +85 C -40 C to +125 C Unit Min Max Min Max
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
7 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Table 5. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL LOW-level output voltage Conditions Min RTC output; RS = VCC; MR = GND IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 2.6 mA; VCC = 4.5 V IO = 3.3 mA; VCC = 6.0 V CTC output; RS = VIL; MR = VIH IO = 3.2 mA; VCC = 4.5 V IO = 4.2 mA; VCC = 6.0 V VI = VIH or VIL; except RTC output IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V VI = VIH or VIL; except RTC and CTC outputs IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V II ICC CI input leakage VI = VCC or GND; VCC = 6.0 V current supply current input capacitance HIGH-level input voltage LOW-level input voltage MR input; VCC = 4.5 V to 5.5 V MR input; VCC = 4.5 V to 5.5 V
[1]
25 C Typ Max
-40 C to +85 C -40 C to +125 C Unit Min Max Min Max
-
0 0 0 -
0.1 0.1 0.1 0.26 0.26
-
0.1 0.1 0.1 0.33 0.33
-
0.1 0.1 0.1 0.4 0.4
V V V V V
-
-
0.26 0.26
-
0.33 0.33
-
0.4 0.4
V V
-
0 0 0
0.1 0.1 0.1
-
0.1 0.1 0.1
-
0.1 0.1 0.1
V V V
-
3.5
0.26 0.26 0.1 8.0 -
-
0.33 0.33 1.0 80 -
-
0.4 0.4 1.0 160 -
V V A A pF
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
74HCT4060 VIH VIL 2.0 0.8 2.0 0.8 2.0 0.8 V V
[1]
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
8 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Table 5. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH HIGH-level output voltage Conditions Min RTC output; RS = MR = VCC IO = -20 A; VCC = 4.5 V IO = -0.65 mA; VCC = 4.5 V RTC output; RS = MR = GND IO = -20 A; VCC = 4.5 V IO = -2.6 mA; VCC = 4.5 V CTC output; RS = VIH; MR = VIL IO = -3.2 mA; VCC = 4.5 V VI = VIH or VIL; except RTC output IO = -20 A; VCC = 4.5 V VI = VIH or VIL; except RTC and CTC outputs IO = -4.0 mA; VCC = 4.5 V VOL LOW-level output voltage RTC output; RS = VCC; MR = GND IO = 20 A; VCC = 4.5 V IO = 2.6 mA; VCC = 4.5 V CTC output; RS = VIL; MR = VIH IO = 3.2 mA; VCC = 4.5 V VI = VIH or VIL; except RTC output IO = 20 A; VCC = 4.5 V VI = VIH or VIL; except RTC and CTC outputs IO = 4.0 mA; VCC = 4.5 V II ICC ICC input leakage VI = VCC or GND; VCC = 5.5 V current supply current additional supply current input capacitance VI = VCC or GND; VCC = 5.5 V; IO = 0 A per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A 40 0.26 0.1 8.0 144 0.33 1.0 80 180 0.4 1.0 160 196 V A A A 0 0.1 0.1 0.1 V 0.26 0.33 0.4 V 0 0.1 0.26 0.1 0.33 0.1 0.4 V V 3.98 3.84 3.7 V 4.4 4.5 4.4 4.4 V 3.98 3.84 3.7 V 4.4 3.98 4.5 4.4 3.84 4.4 3.7 V V 4.4 3.98 4.5 4.4 3.84 4.4 3.7 V V 25 C Typ Max -40 C to +85 C -40 C to +125 C Unit Min Max Min Max
CI
-
3.5
-
-
-
-
-
pF
[1]
For HCT4060, only input MR (pin 12) has TTL input switching levels.
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
9 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
11. Dynamic characteristics
Table 6. Dynamic characteristics GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11. Symbol Parameter 74HC4060 tpd propagation delay RS to Q3; see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V Qn to Qn+1; see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V tPHL HIGH to LOW MR to Qn; see Figure 10 propagation VCC = 2.0 V delay VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V tt transition time Qn; see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW pulse width RS (HIGH or LOW); see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V MR (HIGH); see Figure 10 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V trec recovery time MR to RS; see Figure 10 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 100 20 17 28 10 8 125 25 21 150 30 26 ns ns ns 80 16 14 25 9 7 100 20 17 120 24 20 ns ns ns 80 16 14 17 6 5 100 20 17 120 24 20 ns ns ns
[3] [2] [1]
Conditions Min
25 C Typ Max
-40 C to +85 C -40 C to +125 C Unit Min Max Min Max
-
99 36 31 29 22 8 6 6 55 20 17 16 19 7 6
300 60 51 80 16 14 175 35 30 75 15 13
-
375 75 64 100 20 17 220 44 37 95 19 16
-
450 90 77 120 24 20 265 53 45 110 22 19
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
10 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Table 6. Dynamic characteristics ...continued GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11. Symbol Parameter fmax maximum frequency Conditions Min RS; see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 5.0 V; CL = 15 pF VCC = 6.0 V CPD power dissipation capacitance propagation delay VI = GND to VCC; VCC = 5 V; fi = 1 MHz
[4]
25 C Typ 26 80 87 95 40 Max -
-40 C to +85 C -40 C to +125 C Unit Min 4.8 24 28 Max Min 4 20 24 Max MHz MHz MHz MHz pF
6 30 35 -
74HCT4060 tpd RS to Q3; see Figure 8 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF Qn to Qn+1; see Figure 9 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF tPHL HIGH to LOW MR to Qn; see Figure 10 propagation VCC = 4.5 V delay VCC = 5.0 V; CL = 15 pF tt tW transition time Qn; see Figure 8 VCC = 4.5 V pulse width RS (HIGH or LOW); see Figure 8 VCC = 4.5 V MR (HIGH); see Figure 10 VCC = 4.5 V trec fmax recovery time maximum frequency MR to RS; see Figure 10 VCC = 4.5 V RS; see Figure 8 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF 30 80 88 24 20 MHz MHz 26 13 33 39 ns 16 6 20 24 ns 16 6 20 24 ns
[3] [2] [1]
-
33 31 8 6 21 18 7
66 16 44 15
-
83 20 55 19
-
99 24 66 22
ns ns ns ns ns ns ns
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
11 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Table 6. Dynamic characteristics ...continued GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11. Symbol Parameter CPD power dissipation capacitance Conditions Min VI = GND to VCC - 1.5 V; VCC = 5 V; fi = 1 MHz
[4]
25 C Typ 40 Max -
-40 C to +85 C -40 C to +125 C Unit Min Max Min Max pF
[1] [2] [3] [4]
tpd is the same as tPHL and tPLH. Qn+1 is the next Qn output. tt is the same as tTHL and tTLH. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of outputs.
12. Waveforms
1/fmax VI RS input GND tW tPHL VOH Q3 output VOL 90 % VM 10 % tTHL 10 % tTLH 001aai118 tPLH 90 % VM
Measurement points are given in Table 7. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8.
Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
12 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
VOH Qn output VOL tPLH VOH Qn+1 output VOL VM
001aai120
VM
tPHL
Measurement points are given in Table 7. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 9.
Waveforms showing the output Qn to output Qn+1 propagation delays
VI MR input GND TW VI RS input GND tPHL VOH Qn output VOL VM
001aai119
VM
trec
VM
Measurement points are given in Table 7. VOL and VOH are typical voltage output levels that occur with the output load.
Fig 10. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the master reset to clock (RS) recovery time Table 7. Type 74HC4060 74HCT4060 Measurement points Input VM 0.5 x VCC 1.3 V Output VM 0.5 x VCC 1.3 V
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
13 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
VI negative pulse GND
tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VCC G
VI VO
VM
VI positive pulse GND
VM
DUT
RT CL
001aah768
Test data is given in Table 8. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance.
Fig 11. Test circuit for measuring switching times Table 8. Type 74HC4060 74HCT4060 Test data Input VI VCC 3V tr, tf 6 ns 6 ns Load CL 15 pF, 50 pF 15 pF, 50 pF
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
14 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
13. RC oscillator
13.1 Timing component limitations
The oscillator frequency is mainly determined by RtCt, provided R2 2Rt and R2C2 << RtCt. The function of R2 is to minimize the influence of the forward voltage across the input protection diodes on the frequency. The stray capacitance C2 should be kept as small as possible. In consideration of accuracy, Ct must be larger than the inherent stray capacitance. Rt must be larger than the ON resistance in series with it, which typically is 280 at VCC = 2.0 V, 130 at VCC = 4.5 V and 100 at VCC = 6.0 V.
MR (from logic) 11 RS
74HC4060 74HCT4060
RTC 10
C2 R2 Rt
CTC 9
Ct
001aai121
Typical formula for oscillator frequency: f osc = -----------------------------2.5 x R t x C t
1
Fig 12. Example of a RC oscillator
The recommended values for these components to maintain agreement with the typical oscillation formula are: Ct > 50 pF, up to any practical value and 10 k < Rt < 1 M. In order to avoid start-up problems, Rt 1 k.
13.2 Typical crystal oscillator circuit
In Figure 13, R2 is the power limiting resistor. For starting and maintaining oscillation a minimum transconductance is necessary, so R2 should not be too large. A practical value for R2 is 2.2 k.
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
15 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
MR (from logic) 11 RS
74HC4060 74HCT4060
Rbias 560 k
VDD RTC 10
0.47 pF 100 F
Rbias 100 k to 1M
VI (fi = 1 kHz)
R2 2.2 k
input
output
A
IO GND
001aai123
gfs = IO / VI at VO is constant; MR = LOW.
C3 22 pF to 37 pF C2 100 pF
See also Figure 15.
001aai122
Fig 13. External component connection for a crystal oscillator
Fig 14. Test set-up for measuring forward transconductance
14
(1)
001aai124
gfs (mA/V) 10
(2)
(3)
6
2 0 2 4 VCC (V) 6
Tamb = 25 C. (1) Maximum. (2) Typical. (3) Minimum.
Fig 15. Typical forward transconductance as function of the supply voltage
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
16 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
105 fosc (Hz) 104 Rt
001aai125
105 fosc (Hz) 104 Ct
001aai127
103
103
102
102
10 103
104
105 Rt ()
106
10 10-4
10-3
10-2 Ct (F)
10-1
VCC = 2.0 V to 6.0 V; Tamb = 25 C. For Rt curve: Ct = 1 nF; R2 = 2 x Rt.
VCC = 2.0 V to 6.0 V; Tamb = 25 C. For Ct curve: Rt = 100 k; R2 = 200 k.
Fig 16. RC oscillator frequency as a function of Rt
Fig 17. RC oscillator frequency as a function of Ct
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
17 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
14. Package outline
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
D seating plane
ME
A2
A
L
A1
c Z e b1 b 16 9 b2 MH wM (e 1)
pin 1 index E
1
8
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 0.76 0.03
Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-4 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION
ISSUE DATE 95-01-14 03-02-13
Fig 18. Package outline SOT38-4 (DIP16)
74HC_HCT4060_3 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
18 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 pin 1 index Lp 1 e bp 8 wM L detail X A1 (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.39 0.014 0.0075 0.38
0.244 0.041 0.228
0.028 0.004 0.012
8 o 0
o
ISSUE DATE 99-12-27 03-02-19
Fig 19. Package outline SOT109-1 (SO16)
74HC_HCT4060_3 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
19 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A X
c y HE vM A
Z 16 9
Q A2 A1 pin 1 index Lp L 1 bp 8 wM detail X (A 3) A
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 8 o 0
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 20. Package outline SOT338-1 (SSOP16)
74HC_HCT4060_3 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
20 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c y HE vMA
Z
16
9
Q A2 pin 1 index A1 Lp L (A 3) A
1
e bp
8
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 8 o 0
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
Fig 21. Package outline SOT403-1 (TSSOP16)
74HC_HCT4060_3 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
21 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm
D
B
A
A A1 E c
terminal 1 index area
detail X
terminal 1 index area e 2 L
e1 b 7 vMCAB wM C y1 C
C y
1 Eh 16
8 e 9
15 Dh
10 X 2.5 scale 5 mm
0
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.6 3.4 Dh 2.15 1.85 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT763-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27
Fig 22. Package outline SOT763-1 (DHVQFN16)
74HC_HCT4060_3 (c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
22 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
15. Abbreviations
Table 9. Acronym CMOS DUT ESD HBM MM TTL Abbreviations Description Complementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic
16. Revision history
Table 10. Revision history Release date 20080714 Data sheet status Product data sheet Change notice Supersedes 74HC_HCT4060_CNV_2 Document ID 74HC_HCT4060_3 Modifications:
* * * * *
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Section 4: DHVQFN16 package added. Section 8: derating values added for DHVQFN16 package. Section 14: outline drawing added for DHVQFN16 package. Product specification -
74HC_HCT4060_CNV_2
19970901
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
23 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
17. Legal information 18. Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
18.1 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
18.2 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
18.3 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT4060_3
(c) NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 -- 14 July 2008
24 of 25
NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
20. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 13.1 13.2 14 15 16 17 18 18.1 18.2 18.3 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 RC oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Timing component limitations . . . . . . . . . . . . . 15 Typical crystal oscillator circuit . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 23 Legal information. . . . . . . . . . . . . . . . . . . . . . . 24 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Contact information. . . . . . . . . . . . . . . . . . . . . 24 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 14 July 2008 Document identifier: 74HC_HCT4060_3

▲Up To Search▲

Price & Availability of 74HC4060

	To Download 74HC4060 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .